82108
za mesiac
Dátum začiatku
Responsibilities:
- Working with a small team to implement, debug, and verify a high-performance PCIe interface.
- Build the infrastructure to support PCIe during FPGA emulation and bringup.
Qualifications:
- Requires 10 to 15 years of applicable experience (bright individuals with lower experience can also apply).
- Experience and background with PCIe controller/device design.
- Familiarity with bus traffic analyzers and logic analyzers.
- Familiarity with data eye and BER analysis.
- Verilog / System Verilog / Synthesis / STA / CDC / Lint experience.
Benefits:
- Competitive salary and benefits package.
- Opportunities for professional development and advancement.
- International environment and further career progression.
- Getting in touch with bleeding edge technology.
- Flexible working hours
- Work-life balance.
- Collaborative and supportive work environment.
If you meet the qualifications and are interested in this opportunity, please submit your resume and cover letter. We look forward to hearing from you!
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